src/ambient-attx4.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn 0 .text 00000602 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .data 00000002 00800060 00000602 00000696 2**0 CONTENTS, ALLOC, LOAD, DATA 2 .bss 00000036 00800062 00800062 00000698 2**0 ALLOC 3 .stab 0000075c 00000000 00000000 00000698 2**2 CONTENTS, READONLY, DEBUGGING 4 .stabstr 000000dd 00000000 00000000 00000df4 2**0 CONTENTS, READONLY, DEBUGGING 5 .debug_aranges 00000040 00000000 00000000 00000ed1 2**0 CONTENTS, READONLY, DEBUGGING 6 .debug_pubnames 00000229 00000000 00000000 00000f11 2**0 CONTENTS, READONLY, DEBUGGING 7 .debug_info 00000669 00000000 00000000 0000113a 2**0 CONTENTS, READONLY, DEBUGGING 8 .debug_abbrev 000002e3 00000000 00000000 000017a3 2**0 CONTENTS, READONLY, DEBUGGING 9 .debug_line 000008dc 00000000 00000000 00001a86 2**0 CONTENTS, READONLY, DEBUGGING 10 .debug_frame 00000170 00000000 00000000 00002364 2**2 CONTENTS, READONLY, DEBUGGING 11 .debug_str 0000030a 00000000 00000000 000024d4 2**0 CONTENTS, READONLY, DEBUGGING 12 .debug_loc 000002bd 00000000 00000000 000027de 2**0 CONTENTS, READONLY, DEBUGGING 13 .debug_pubtypes 0000007b 00000000 00000000 00002a9b 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: 00000000 <__vectors>: 0: 19 c0 rjmp .+50 ; 0x34 <__ctors_end> 2: cf c1 rjmp .+926 ; 0x3a2 <__vector_1> 4: 32 c0 rjmp .+100 ; 0x6a <__bad_interrupt> 6: 31 c0 rjmp .+98 ; 0x6a <__bad_interrupt> 8: 30 c0 rjmp .+96 ; 0x6a <__bad_interrupt> a: 2f c0 rjmp .+94 ; 0x6a <__bad_interrupt> c: 30 c1 rjmp .+608 ; 0x26e <__vector_6> e: 2d c0 rjmp .+90 ; 0x6a <__bad_interrupt> 10: 2c c0 rjmp .+88 ; 0x6a <__bad_interrupt> 12: 2c c0 rjmp .+88 ; 0x6c <__vector_9> 14: 2a c0 rjmp .+84 ; 0x6a <__bad_interrupt> 16: 29 c0 rjmp .+82 ; 0x6a <__bad_interrupt> 18: 28 c0 rjmp .+80 ; 0x6a <__bad_interrupt> 1a: 27 c0 rjmp .+78 ; 0x6a <__bad_interrupt> 1c: 26 c0 rjmp .+76 ; 0x6a <__bad_interrupt> 1e: 25 c0 rjmp .+74 ; 0x6a <__bad_interrupt> 20: 30 c0 rjmp .+96 ; 0x82 <__vector_16> 22: f7 c1 rjmp .+1006 ; 0x412 <__vector_1+0x70> 24: 06 c2 rjmp .+1036 ; 0x432 <__vector_1+0x90> 26: 09 c2 rjmp .+1042 ; 0x43a <__vector_1+0x98> 28: 08 c2 rjmp .+1040 ; 0x43a <__vector_1+0x98> 2a: 45 c2 rjmp .+1162 ; 0x4b6 <__vector_1+0x114> 2c: 44 c2 rjmp .+1160 ; 0x4b6 <__vector_1+0x114> 2e: 66 c2 rjmp .+1228 ; 0x4fc <__vector_1+0x15a> 30: f2 c1 rjmp .+996 ; 0x416 <__vector_1+0x74> 32: 01 c2 rjmp .+1026 ; 0x436 <__vector_1+0x94> 00000034 <__ctors_end>: 34: 11 24 eor r1, r1 36: 1f be out 0x3f, r1 ; 63 38: cf e5 ldi r28, 0x5F ; 95 3a: d1 e0 ldi r29, 0x01 ; 1 3c: de bf out 0x3e, r29 ; 62 3e: cd bf out 0x3d, r28 ; 61 00000040 <__do_copy_data>: 40: 10 e0 ldi r17, 0x00 ; 0 42: a0 e6 ldi r26, 0x60 ; 96 44: b0 e0 ldi r27, 0x00 ; 0 46: e2 e0 ldi r30, 0x02 ; 2 48: f6 e0 ldi r31, 0x06 ; 6 4a: 02 c0 rjmp .+4 ; 0x50 <__do_copy_data+0x10> 4c: 05 90 lpm r0, Z+ 4e: 0d 92 st X+, r0 50: a2 36 cpi r26, 0x62 ; 98 52: b1 07 cpc r27, r17 54: d9 f7 brne .-10 ; 0x4c <__do_copy_data+0xc> 00000056 <__do_clear_bss>: 56: 10 e0 ldi r17, 0x00 ; 0 58: a2 e6 ldi r26, 0x62 ; 98 5a: b0 e0 ldi r27, 0x00 ; 0 5c: 01 c0 rjmp .+2 ; 0x60 <.do_clear_bss_start> 0000005e <.do_clear_bss_loop>: 5e: 1d 92 st X+, r1 00000060 <.do_clear_bss_start>: 60: a8 39 cpi r26, 0x98 ; 152 62: b1 07 cpc r27, r17 64: e1 f7 brne .-8 ; 0x5e <.do_clear_bss_loop> 66: c5 d0 rcall .+394 ; 0x1f2
68: ca c2 rjmp .+1428 ; 0x5fe <_exit> 0000006a <__bad_interrupt>: 6a: ca cf rjmp .-108 ; 0x0 <__vectors> 0000006c <__vector_9>: * results in one clock period on the clock pin and for the USI counter. */ ISR(TIM0_COMPA_vect) { 6c: 1f 92 push r1 6e: 0f 92 push r0 70: 0f b6 in r0, 0x3f ; 63 72: 0f 92 push r0 74: 11 24 eor r1, r1 USICR |= (1<: */ ISR(USI_OVF_vect) { 82: 1f 92 push r1 84: 0f 92 push r0 86: 0f b6 in r0, 0x3f ; 63 88: 0f 92 push r0 8a: 11 24 eor r1, r1 8c: 8f 93 push r24 // Master must now disable the compare match interrupt // to prevent more USI counter clocks. if( spiX_status.masterMode == 1 ) { 8e: 80 91 97 00 lds r24, 0x0097 92: 80 ff sbrs r24, 0 94: 03 c0 rjmp .+6 ; 0x9c <__vector_16+0x1a> TIMSK0 &= ~(1<: { // Configure port directions. USI_DIR_REG |= (1<: { // Configure port directions. USI_DIR_REG |= (1<: // Check if transmission in progress, // i.e. USI counter unequal to zero. if( (USISR & 0x0F) != 0 ) { 130: 2e b1 in r18, 0x0e ; 14 132: 30 e0 ldi r19, 0x00 ; 0 134: 2f 70 andi r18, 0x0F ; 15 136: 30 70 andi r19, 0x00 ; 0 138: 21 15 cp r18, r1 13a: 31 05 cpc r19, r1 13c: 39 f0 breq .+14 ; 0x14c // Indicate write collision and return. spiX_status.writeCollision = 1; 13e: 80 91 97 00 lds r24, 0x0097 142: 84 60 ori r24, 0x04 ; 4 144: 80 93 97 00 sts 0x0097, r24 return 0; 148: 80 e0 ldi r24, 0x00 ; 0 14a: 08 95 ret } // Reinit flags. spiX_status.transferComplete = 0; 14c: 90 91 97 00 lds r25, 0x0097 150: 9d 7f andi r25, 0xFD ; 253 152: 90 93 97 00 sts 0x0097, r25 spiX_status.writeCollision = 0; 156: 90 91 97 00 lds r25, 0x0097 15a: 9b 7f andi r25, 0xFB ; 251 15c: 90 93 97 00 sts 0x0097, r25 // Put data in USI data register. USIDR = val; 160: 8f b9 out 0x0f, r24 ; 15 // Master should now enable compare match interrupts. if( spiX_status.masterMode == 1 ) { 162: 80 91 97 00 lds r24, 0x0097 166: 80 ff sbrs r24, 0 168: 06 c0 rjmp .+12 ; 0x176 <__stack+0x17> TIFR0 |= (1<: { return storedUSIDR; } 182: 80 91 96 00 lds r24, 0x0096 186: 08 95 ret 00000188 : void spiX_wait(void) { do {} while( spiX_status.transferComplete == 0 ); 188: 80 91 97 00 lds r24, 0x0097 18c: 81 ff sbrs r24, 1 18e: fc cf rjmp .-8 ; 0x188 } 190: 08 95 ret 00000192 : } void setupIO(void) { // Make the "decibel" pin an input cbi(DDRA, SOUND_PIN); 192: d1 98 cbi 0x1a, 1 ; 26 // Make the ambient light as input cbi(DDRA, LIGHT_PIN); 194: d3 98 cbi 0x1a, 3 ; 26 // Make the Interrupt pin an output sbi(DDRB, IRQ_PIN); 196: b9 9a sbi 0x17, 1 ; 23 // Pull it low cbi(PORTB, IRQ_PIN); 198: c1 98 cbi 0x18, 1 ; 24 // Set MOSI as an input cbi(DDRA, MOSI); 19a: d6 98 cbi 0x1a, 6 ; 26 } 19c: 08 95 ret 0000019e : void enableSPI(void) { // configure: interrupt on INT0 pin falling edge MCUCR = (1<: void setupTimer(void) { // Set clock divider to 8 (1MHz) sbi(TCCR1B, CS11); 1b2: 8e b5 in r24, 0x2e ; 46 1b4: 82 60 ori r24, 0x02 ; 2 1b6: 8e bd out 0x2e, r24 ; 46 // Set the counter to CTC (clear on match) sbi(TCCR1B, WGM12); 1b8: 8e b5 in r24, 0x2e ; 46 1ba: 88 60 ori r24, 0x08 ; 8 1bc: 8e bd out 0x2e, r24 ; 46 // Set frequency to 5kHz // (8000000/8/200) Hz OCR1A = 200; 1be: 88 ec ldi r24, 0xC8 ; 200 1c0: 90 e0 ldi r25, 0x00 ; 0 1c2: 9b bd out 0x2b, r25 ; 43 1c4: 8a bd out 0x2a, r24 ; 42 // Allow interrupts on comp a sbi(TIMSK1, OCIE1A); 1c6: 61 9a sbi 0x0c, 1 ; 12 } 1c8: 08 95 ret 000001ca : void prepareADC(void) { // Make sure the power reduction register isn't set cbi(PRR, PRADC); 1ca: 00 98 cbi 0x00, 0 ; 0 // Enable ADC by writing ADEN in ADSCRA sbi(ADCSRA, ADEN); 1cc: 37 9a sbi 0x06, 7 ; 6 // Set up ADC clock prescalar to 64 (125kHz) by writing ADPS bits of ADSCRA ADCSRA |= 6; 1ce: 86 b1 in r24, 0x06 ; 6 1d0: 86 60 ori r24, 0x06 ; 6 1d2: 86 b9 out 0x06, r24 ; 6 // Set reference voltage to AREF by writing to the ADMUX register ADMUX = 0; 1d4: 17 b8 out 0x07, r1 ; 7 cbi(ADMUX, REFS1); 1d6: 3f 98 cbi 0x07, 7 ; 7 sbi(ADMUX, REFS0); 1d8: 3e 9a sbi 0x07, 6 ; 7 } 1da: 08 95 ret 000001dc : } void setup(void) { // Turn off interrupts cli(); 1dc: f8 94 cli // Reset buffer locations LightBuffer.bufferLocation = 0; 1de: 10 92 80 00 sts 0x0080, r1 SoundBuffer.bufferLocation = 0; 1e2: 10 92 95 00 sts 0x0095, r1 setupIO(); 1e6: d5 df rcall .-86 ; 0x192 prepareADC(); 1e8: f0 df rcall .-32 ; 0x1ca enableSPI(); 1ea: d9 df rcall .-78 ; 0x19e setupTimer(); 1ec: e2 df rcall .-60 ; 0x1b2 // Unleash the interrupts! sei(); 1ee: 78 94 sei } 1f0: 08 95 ret 000001f2
: extern void _exit(); int main(void) { checksum = calculate_checksum( (unsigned short) _exit << 1 ); 1f2: 8f ef ldi r24, 0xFF ; 255 1f4: 92 e0 ldi r25, 0x02 ; 2 1f6: 88 0f add r24, r24 1f8: 99 1f adc r25, r25 1fa: c3 d1 rcall .+902 ; 0x582 1fc: 90 93 61 00 sts 0x0061, r25 200: 80 93 60 00 sts 0x0060, r24 setup(); 204: eb df rcall .-42 ; 0x1dc 206: ff cf rjmp .-2 ; 0x206 00000208 : uint16_t analogRead(char pin) { uint16_t value; // Clear lowest five bits ADMUX &= 0b11100000; 208: 97 b1 in r25, 0x07 ; 7 20a: 90 7e andi r25, 0xE0 ; 224 20c: 97 b9 out 0x07, r25 ; 7 // Set five bits with pin ADMUX |= (pin & 0b00011111); 20e: 97 b1 in r25, 0x07 ; 7 210: 8f 71 andi r24, 0x1F ; 31 212: 89 2b or r24, r25 214: 87 b9 out 0x07, r24 ; 7 // Start the conversion sbi(ADCSRA, ADSC); 216: 36 9a sbi 0x06, 6 ; 6 // Wait for the conversion to finish while((ADCSRA & (1< value = ADCL; 21c: 84 b1 in r24, 0x04 ; 4 value += (ADCH << 8); 21e: 95 b1 in r25, 0x05 ; 5 220: 39 2f mov r19, r25 222: 20 e0 ldi r18, 0x00 ; 0 224: 28 0f add r18, r24 226: 31 1d adc r19, r1 // Return the 10 bit result return value; } 228: c9 01 movw r24, r18 22a: 08 95 ret 0000022c : volatile DataBuffer bufferForCommand(uint8_t command) { if (command == LIGHT_CMD) 22c: 62 30 cpi r22, 0x02 ; 2 22e: 59 f4 brne .+22 ; 0x246 { return LightBuffer; 230: 28 2f mov r18, r24 232: 39 2f mov r19, r25 234: d9 01 movw r26, r18 236: ec e6 ldi r30, 0x6C ; 108 238: f0 e0 ldi r31, 0x00 ; 0 23a: 25 e1 ldi r18, 0x15 ; 21 23c: 01 90 ld r0, Z+ 23e: 0d 92 st X+, r0 240: 21 50 subi r18, 0x01 ; 1 242: e1 f7 brne .-8 ; 0x23c 244: 08 95 ret } else { return SoundBuffer; 246: 28 2f mov r18, r24 248: 39 2f mov r19, r25 24a: d9 01 movw r26, r18 24c: e1 e8 ldi r30, 0x81 ; 129 24e: f0 e0 ldi r31, 0x00 ; 0 250: 25 e1 ldi r18, 0x15 ; 21 252: 01 90 ld r0, Z+ 254: 0d 92 st X+, r0 256: 21 50 subi r18, 0x01 ; 1 258: e1 f7 brne .-8 ; 0x252 } } 25a: 08 95 ret 0000025c : volatile uint16_t *triggerValueForCommand(uint8_t command) { if (command == LIGHT_TRIGGER_CMD) { 25c: 84 30 cpi r24, 0x04 ; 4 25e: 19 f4 brne .+6 ; 0x266 return &lightTrigger; 260: 24 e6 ldi r18, 0x64 ; 100 262: 30 e0 ldi r19, 0x00 ; 0 264: 02 c0 rjmp .+4 ; 0x26a } else { return &soundTrigger; 266: 28 e6 ldi r18, 0x68 ; 104 268: 30 e0 ldi r19, 0x00 ; 0 } } 26a: c9 01 movw r24, r18 26c: 08 95 ret 0000026e <__vector_6>: ISR(TIM1_COMPA_vect) { 26e: 1f 92 push r1 270: 0f 92 push r0 272: 0f b6 in r0, 0x3f ; 63 274: 0f 92 push r0 276: 11 24 eor r1, r1 278: 1f 93 push r17 27a: 2f 93 push r18 27c: 3f 93 push r19 27e: 4f 93 push r20 280: 5f 93 push r21 282: 6f 93 push r22 284: 7f 93 push r23 286: 8f 93 push r24 288: 9f 93 push r25 28a: af 93 push r26 28c: bf 93 push r27 28e: cf 93 push r28 290: df 93 push r29 292: ef 93 push r30 294: ff 93 push r31 LightBuffer.buffer[LightBuffer.bufferLocation++] = analogRead(LIGHT_PIN); 296: 10 91 80 00 lds r17, 0x0080 29a: c1 2f mov r28, r17 29c: d0 e0 ldi r29, 0x00 ; 0 29e: 83 e0 ldi r24, 0x03 ; 3 2a0: b3 df rcall .-154 ; 0x208 2a2: cc 0f add r28, r28 2a4: dd 1f adc r29, r29 2a6: c4 59 subi r28, 0x94 ; 148 2a8: df 4f sbci r29, 0xFF ; 255 2aa: 99 83 std Y+1, r25 ; 0x01 2ac: 88 83 st Y, r24 2ae: 1f 5f subi r17, 0xFF ; 255 2b0: 10 93 80 00 sts 0x0080, r17 // If a light trigger has been set and the level is hit if (lightTrigger != 0 && LightBuffer.buffer[LightBuffer.bufferLocation - 1] >= lightTrigger) { 2b4: 80 91 64 00 lds r24, 0x0064 2b8: 90 91 65 00 lds r25, 0x0065 2bc: 00 97 sbiw r24, 0x00 ; 0 2be: f1 f0 breq .+60 ; 0x2fc <__vector_6+0x8e> 2c0: e0 91 80 00 lds r30, 0x0080 2c4: f0 e0 ldi r31, 0x00 ; 0 2c6: ee 0f add r30, r30 2c8: ff 1f adc r31, r31 2ca: e6 59 subi r30, 0x96 ; 150 2cc: ff 4f sbci r31, 0xFF ; 255 2ce: 20 81 ld r18, Z 2d0: 31 81 ldd r19, Z+1 ; 0x01 2d2: 80 91 64 00 lds r24, 0x0064 2d6: 90 91 65 00 lds r25, 0x0065 2da: 28 17 cp r18, r24 2dc: 39 07 cpc r19, r25 2de: 70 f0 brcs .+28 ; 0x2fc <__vector_6+0x8e> // Set the read value lightTriggerReadVal = LightBuffer.buffer[LightBuffer.bufferLocation - 1]; 2e0: e0 91 80 00 lds r30, 0x0080 2e4: f0 e0 ldi r31, 0x00 ; 0 2e6: ee 0f add r30, r30 2e8: ff 1f adc r31, r31 2ea: e6 59 subi r30, 0x96 ; 150 2ec: ff 4f sbci r31, 0xFF ; 255 2ee: 80 81 ld r24, Z 2f0: 91 81 ldd r25, Z+1 ; 0x01 2f2: 90 93 67 00 sts 0x0067, r25 2f6: 80 93 66 00 sts 0x0066, r24 // Raise the interrupt pin sbi(PORTB, IRQ_PIN); 2fa: c1 9a sbi 0x18, 1 ; 24 } if (LightBuffer.bufferLocation == BUF_SIZE) { 2fc: 80 91 80 00 lds r24, 0x0080 300: 8a 30 cpi r24, 0x0A ; 10 302: 11 f4 brne .+4 ; 0x308 <__vector_6+0x9a> LightBuffer.bufferLocation = 0; 304: 10 92 80 00 sts 0x0080, r1 } SoundBuffer.buffer[SoundBuffer.bufferLocation++] = analogRead(SOUND_PIN); 308: 10 91 95 00 lds r17, 0x0095 30c: c1 2f mov r28, r17 30e: d0 e0 ldi r29, 0x00 ; 0 310: 81 e0 ldi r24, 0x01 ; 1 312: 7a df rcall .-268 ; 0x208 314: cc 0f add r28, r28 316: dd 1f adc r29, r29 318: cf 57 subi r28, 0x7F ; 127 31a: df 4f sbci r29, 0xFF ; 255 31c: 99 83 std Y+1, r25 ; 0x01 31e: 88 83 st Y, r24 320: 1f 5f subi r17, 0xFF ; 255 322: 10 93 95 00 sts 0x0095, r17 // If a loudness trigger has been set and the level is hit if (soundTrigger != 0 && SoundBuffer.buffer[SoundBuffer.bufferLocation - 1] >= soundTrigger) { 326: 80 91 68 00 lds r24, 0x0068 32a: 90 91 69 00 lds r25, 0x0069 32e: 00 97 sbiw r24, 0x00 ; 0 330: f1 f0 breq .+60 ; 0x36e <__vector_6+0x100> 332: e0 91 95 00 lds r30, 0x0095 336: f0 e0 ldi r31, 0x00 ; 0 338: ee 0f add r30, r30 33a: ff 1f adc r31, r31 33c: e1 58 subi r30, 0x81 ; 129 33e: ff 4f sbci r31, 0xFF ; 255 340: 20 81 ld r18, Z 342: 31 81 ldd r19, Z+1 ; 0x01 344: 80 91 68 00 lds r24, 0x0068 348: 90 91 69 00 lds r25, 0x0069 34c: 28 17 cp r18, r24 34e: 39 07 cpc r19, r25 350: 70 f0 brcs .+28 ; 0x36e <__vector_6+0x100> // Set the read value soundTriggerReadVal = SoundBuffer.buffer[SoundBuffer.bufferLocation - 1]; 352: e0 91 95 00 lds r30, 0x0095 356: f0 e0 ldi r31, 0x00 ; 0 358: ee 0f add r30, r30 35a: ff 1f adc r31, r31 35c: e1 58 subi r30, 0x81 ; 129 35e: ff 4f sbci r31, 0xFF ; 255 360: 80 81 ld r24, Z 362: 91 81 ldd r25, Z+1 ; 0x01 364: 90 93 6b 00 sts 0x006B, r25 368: 80 93 6a 00 sts 0x006A, r24 // Raise the interrupt pin sbi(PORTB, IRQ_PIN); 36c: c1 9a sbi 0x18, 1 ; 24 } if (SoundBuffer.bufferLocation == BUF_SIZE) { 36e: 80 91 95 00 lds r24, 0x0095 372: 8a 30 cpi r24, 0x0A ; 10 374: 11 f4 brne .+4 ; 0x37a <__vector_6+0x10c> SoundBuffer.bufferLocation = 0; 376: 10 92 95 00 sts 0x0095, r1 } } 37a: ff 91 pop r31 37c: ef 91 pop r30 37e: df 91 pop r29 380: cf 91 pop r28 382: bf 91 pop r27 384: af 91 pop r26 386: 9f 91 pop r25 388: 8f 91 pop r24 38a: 7f 91 pop r23 38c: 6f 91 pop r22 38e: 5f 91 pop r21 390: 4f 91 pop r20 392: 3f 91 pop r19 394: 2f 91 pop r18 396: 1f 91 pop r17 398: 0f 90 pop r0 39a: 0f be out 0x3f, r0 ; 63 39c: 0f 90 pop r0 39e: 1f 90 pop r1 3a0: 18 95 reti 000003a2 <__vector_1>: ISR(INT0_vect){ 3a2: 1f 92 push r1 3a4: 0f 92 push r0 3a6: 0f b6 in r0, 0x3f ; 63 3a8: 0f 92 push r0 3aa: 11 24 eor r1, r1 3ac: df 92 push r13 3ae: ef 92 push r14 3b0: ff 92 push r15 3b2: 0f 93 push r16 3b4: 1f 93 push r17 3b6: 2f 93 push r18 3b8: 3f 93 push r19 3ba: 4f 93 push r20 3bc: 5f 93 push r21 3be: 6f 93 push r22 3c0: 7f 93 push r23 3c2: 8f 93 push r24 3c4: 9f 93 push r25 3c6: af 93 push r26 3c8: bf 93 push r27 3ca: ef 93 push r30 3cc: ff 93 push r31 3ce: df 93 push r29 3d0: cf 93 push r28 3d2: cd b7 in r28, 0x3d ; 61 3d4: de b7 in r29, 0x3e ; 62 3d6: 68 97 sbiw r28, 0x18 ; 24 3d8: de bf out 0x3e, r29 ; 62 3da: cd bf out 0x3d, r28 ; 61 // Disable ADC timer for now cbi(TIMSK1, OCIE1A); 3dc: 61 98 cbi 0x0c, 1 ; 12 // Start up slave spiX_initslave(0); 3de: 80 e0 ldi r24, 0x00 ; 0 3e0: 8c de rcall .-744 ; 0xfa // Enable interrupts (SPI needs this) sei(); 3e2: 78 94 sei //re-enable USI USICR|=(1< spiX_wait(); 3ee: cc de rcall .-616 ; 0x188 unsigned char spiX_get(void) { return storedUSIDR; 3f0: 00 91 96 00 lds r16, 0x0096 // Grab the command char command = spiX_get(); uint16_t value = -1; // Initialize variables volatile char length = 0; 3f4: 19 82 std Y+1, r1 ; 0x01 DataBuffer dataBuffer; volatile uint16_t trigVal = 0; 3f6: 1b 82 std Y+3, r1 ; 0x03 3f8: 1a 82 std Y+2, r1 ; 0x02 // Confirm command spiX_put(command); 3fa: 80 2f mov r24, r16 3fc: 99 de rcall .-718 ; 0x130 // Wait for it to be sent spiX_wait(); 3fe: c4 de rcall .-632 ; 0x188 // Switch based on the command switch(command){ 400: e0 2f mov r30, r16 402: f0 e0 ldi r31, 0x00 ; 0 404: e9 30 cpi r30, 0x09 ; 9 406: f1 05 cpc r31, r1 408: 08 f0 brcs .+2 ; 0x40c <__vector_1+0x6a> 40a: 9b c0 rjmp .+310 ; 0x542 <__vector_1+0x1a0> 40c: ef 5e subi r30, 0xEF ; 239 40e: ff 4f sbci r31, 0xFF ; 255 410: 09 94 ijmp // ACK command checks comms case ACK_CMD: //Send ACK code spiX_put(ACK_CODE); 412: 83 e3 ldi r24, 0x33 ; 51 414: 0b c0 rjmp .+22 ; 0x42c <__vector_1+0x8a> spiX_wait(); break; // If the checksum is asked for case CRC_CMD: spiX_put((checksum >> 8) & 0xff); 416: 80 91 60 00 lds r24, 0x0060 41a: 90 91 61 00 lds r25, 0x0061 41e: 89 2f mov r24, r25 420: 87 de rcall .-754 ; 0x130 spiX_wait(); 422: b2 de rcall .-668 ; 0x188 spiX_put((checksum >> 0) & 0xff); 424: 80 91 60 00 lds r24, 0x0060 428: 90 91 61 00 lds r25, 0x0061 42c: 81 de rcall .-766 ; 0x130 spiX_wait(); 42e: ac de rcall .-680 ; 0x188 break; 430: 88 c0 rjmp .+272 ; 0x542 <__vector_1+0x1a0> // If they want firmware version case FIRMWARE_CMD: // Send the firmware version spiX_put(read_firmware_version()); 432: d9 d0 rcall .+434 ; 0x5e6 434: fb cf rjmp .-10 ; 0x42c <__vector_1+0x8a> spiX_wait(); break; // If they want firmware version case MODULE_ID_CMD: // Send the firmware version spiX_put(read_module_id()); 436: d3 d0 rcall .+422 ; 0x5de 438: f9 cf rjmp .-14 ; 0x42c <__vector_1+0x8a> // Routine for reading buffers case LIGHT_CMD: case SOUND_CMD: // Grab requested buffer dataBuffer = bufferForCommand(command); 43a: ce 01 movw r24, r28 43c: 04 96 adiw r24, 0x04 ; 4 43e: 60 2f mov r22, r16 440: f5 de rcall .-534 ; 0x22c 442: 80 91 96 00 lds r24, 0x0096 // Grab read length length = spiX_get(); 446: 89 83 std Y+1, r24 ; 0x01 // Echo read length spiX_put(length); 448: 89 81 ldd r24, Y+1 ; 0x01 44a: 72 de rcall .-796 ; 0x130 // Wait for echo to complete spiX_wait(); 44c: 9d de rcall .-710 ; 0x188 // Iterate through buffer // Potential Bug: Could read at one index past the last recorded value. may need to decrement before putting for(counter=0;counter // If the buffer is at 0 if (dataBuffer.bufferLocation == 0) { 464: 88 8d ldd r24, Y+24 ; 0x18 466: 88 23 and r24, r24 468: 09 f4 brne .+2 ; 0x46c <__vector_1+0xca> // Set it to the end of the buffer dataBuffer.bufferLocation = (BUF_SIZE-1); 46a: d8 8e std Y+24, r13 ; 0x18 } // Decrement buffer (we read going backwards) dataBuffer.bufferLocation--; 46c: 88 8d ldd r24, Y+24 ; 0x18 46e: 81 50 subi r24, 0x01 ; 1 470: 88 8f std Y+24, r24 ; 0x18 value = dataBuffer.buffer[dataBuffer.bufferLocation]; 472: e8 8d ldd r30, Y+24 ; 0x18 474: f0 e0 ldi r31, 0x00 ; 0 476: ee 0f add r30, r30 478: ff 1f adc r31, r31 47a: ee 0d add r30, r14 47c: ff 1d adc r31, r15 47e: 03 81 ldd r16, Z+3 ; 0x03 480: 14 81 ldd r17, Z+4 ; 0x04 // Put the byte at the current location in the buffer spiX_put(value >> 8); 482: 81 2f mov r24, r17 484: 55 de rcall .-854 ; 0x130 // Wait for it to be sent spiX_wait(); 486: 80 de rcall .-768 ; 0x188 spiX_put(value & 0xFF); 488: 80 2f mov r24, r16 48a: 52 de rcall .-860 ; 0x130 spiX_wait(); 48c: 7d de rcall .-774 ; 0x188 // Wait for echo to complete spiX_wait(); // Iterate through buffer // Potential Bug: Could read at one index past the last recorded value. may need to decrement before putting for(counter=0;counter spiX_wait(); } // Put the stop command spiX_put(STOP_CMD); 4b2: 86 e1 ldi r24, 0x16 ; 22 4b4: bb cf rjmp .-138 ; 0x42c <__vector_1+0x8a> case LIGHT_TRIGGER_CMD: case SOUND_TRIGGER_CMD: // Gather high 8 bits trigVal = (spiX_get() << 8); 4b6: 30 91 96 00 lds r19, 0x0096 4ba: 20 e0 ldi r18, 0x00 ; 0 4bc: 3b 83 std Y+3, r19 ; 0x03 4be: 2a 83 std Y+2, r18 ; 0x02 // Echo spiX_put(trigVal >> 8); 4c0: 2a 81 ldd r18, Y+2 ; 0x02 4c2: 3b 81 ldd r19, Y+3 ; 0x03 4c4: 83 2f mov r24, r19 4c6: 34 de rcall .-920 ; 0x130 spiX_wait(); 4c8: 5f de rcall .-834 ; 0x188 // Gather low 8 bits trigVal |= (spiX_get()); 4ca: 4a 81 ldd r20, Y+2 ; 0x02 4cc: 5b 81 ldd r21, Y+3 ; 0x03 4ce: 20 91 96 00 lds r18, 0x0096 4d2: 30 e0 ldi r19, 0x00 ; 0 4d4: 24 2b or r18, r20 4d6: 35 2b or r19, r21 4d8: 3b 83 std Y+3, r19 ; 0x03 4da: 2a 83 std Y+2, r18 ; 0x02 //Echo spiX_put(trigVal & 0xFF); 4dc: 8a 81 ldd r24, Y+2 ; 0x02 4de: 9b 81 ldd r25, Y+3 ; 0x03 4e0: 27 de rcall .-946 ; 0x130 spiX_wait(); 4e2: 52 de rcall .-860 ; 0x188 return SoundBuffer; } } volatile uint16_t *triggerValueForCommand(uint8_t command) { if (command == LIGHT_TRIGGER_CMD) { 4e4: 04 30 cpi r16, 0x04 ; 4 4e6: 19 f4 brne .+6 ; 0x4ee <__vector_1+0x14c> return &lightTrigger; 4e8: e4 e6 ldi r30, 0x64 ; 100 4ea: f0 e0 ldi r31, 0x00 ; 0 4ec: 02 c0 rjmp .+4 ; 0x4f2 <__vector_1+0x150> } else { return &soundTrigger; 4ee: e8 e6 ldi r30, 0x68 ; 104 4f0: f0 e0 ldi r31, 0x00 ; 0 trigVal |= (spiX_get()); //Echo spiX_put(trigVal & 0xFF); spiX_wait(); *(triggerValueForCommand(command)) = trigVal; 4f2: 8a 81 ldd r24, Y+2 ; 0x02 4f4: 9b 81 ldd r25, Y+3 ; 0x03 4f6: 91 83 std Z+1, r25 ; 0x01 4f8: 80 83 st Z, r24 break; 4fa: 23 c0 rjmp .+70 ; 0x542 <__vector_1+0x1a0> case TRIGGER_FETCH_CMD: // Put Light Trigger Val spiX_put(lightTriggerReadVal >> 8); 4fc: 80 91 66 00 lds r24, 0x0066 500: 90 91 67 00 lds r25, 0x0067 504: 89 2f mov r24, r25 506: 14 de rcall .-984 ; 0x130 // Wait for it to go through spiX_wait(); 508: 3f de rcall .-898 ; 0x188 spiX_put(lightTriggerReadVal & 0xFF); 50a: 80 91 66 00 lds r24, 0x0066 50e: 90 91 67 00 lds r25, 0x0067 512: 0e de rcall .-996 ; 0x130 // Wait for it to go through spiX_wait(); 514: 39 de rcall .-910 ; 0x188 // Clear it lightTriggerReadVal = 0; 516: 10 92 67 00 sts 0x0067, r1 51a: 10 92 66 00 sts 0x0066, r1 // Put Loudnesss Trigger Val spiX_put(soundTriggerReadVal >> 8); 51e: 80 91 6a 00 lds r24, 0x006A 522: 90 91 6b 00 lds r25, 0x006B 526: 89 2f mov r24, r25 528: 03 de rcall .-1018 ; 0x130 // Wait for it to be sent spiX_wait(); 52a: 2e de rcall .-932 ; 0x188 // Put Loudnesss Trigger Val spiX_put(soundTriggerReadVal & 0xFF); 52c: 80 91 6a 00 lds r24, 0x006A 530: 90 91 6b 00 lds r25, 0x006B 534: fd dd rcall .-1030 ; 0x130 // Wait for it to go through spiX_wait(); 536: 28 de rcall .-944 ; 0x188 // Clear it soundTriggerReadVal = 0; 538: 10 92 6b 00 sts 0x006B, r1 53c: 10 92 6a 00 sts 0x006A, r1 // Clear IRQ cbi(PORTB, IRQ_PIN); 540: c1 98 cbi 0x18, 1 ; 24 break; } // Disable USI USICR&= ~(1<: #include "../include/common.h" unsigned short calculate_checksum( unsigned short length) { 582: cf 93 push r28 unsigned char i; unsigned int data; unsigned int crc = 0xffff; char *data_p = 0x0000; if (length == 0) 584: 00 97 sbiw r24, 0x00 ; 0 586: 31 f1 breq .+76 ; 0x5d4 588: 40 e0 ldi r20, 0x00 ; 0 58a: 50 e0 ldi r21, 0x00 ; 0 58c: 2f ef ldi r18, 0xFF ; 255 58e: 3f ef ldi r19, 0xFF ; 255 for (i=0, data= pgm_read_byte(data_p++); i < 8; i++, data >>= 1) { if ((crc & 0x0001) ^ (data & 0x0001)) crc = (crc >> 1) ^ POLY; 590: 68 e0 ldi r22, 0x08 ; 8 592: 74 e8 ldi r23, 0x84 ; 132 unsigned char i; unsigned int data; unsigned int crc = 0xffff; char *data_p = 0x0000; if (length == 0) 594: fa 01 movw r30, r20 return (~crc); do { for (i=0, data= pgm_read_byte(data_p++); 596: 4f 5f subi r20, 0xFF ; 255 598: 5f 4f sbci r21, 0xFF ; 255 59a: e4 91 lpm r30, Z+ 59c: f0 e0 ldi r31, 0x00 ; 0 59e: c8 e0 ldi r28, 0x08 ; 8 i < 8; i++, data >>= 1) { if ((crc & 0x0001) ^ (data & 0x0001)) 5a0: d9 01 movw r26, r18 5a2: ae 27 eor r26, r30 5a4: bf 27 eor r27, r31 5a6: 36 95 lsr r19 5a8: 27 95 ror r18 5aa: a0 ff sbrs r26, 0 5ac: 02 c0 rjmp .+4 ; 0x5b2 crc = (crc >> 1) ^ POLY; 5ae: 26 27 eor r18, r22 5b0: 37 27 eor r19, r23 else crc >>= 1; 5b2: c1 50 subi r28, 0x01 ; 1 if (length == 0) return (~crc); do { for (i=0, data= pgm_read_byte(data_p++); 5b4: 19 f0 breq .+6 ; 0x5bc i < 8; i++, data >>= 1) 5b6: f6 95 lsr r31 5b8: e7 95 ror r30 5ba: f2 cf rjmp .-28 ; 0x5a0 { if ((crc & 0x0001) ^ (data & 0x0001)) crc = (crc >> 1) ^ POLY; else crc >>= 1; } } while (--length); 5bc: 48 17 cp r20, r24 5be: 59 07 cpc r21, r25 5c0: 49 f7 brne .-46 ; 0x594 crc = ~crc; 5c2: 20 95 com r18 5c4: 30 95 com r19 data = crc; crc = (crc << 8) | (data >> 8 & 0xff); 5c6: 92 2f mov r25, r18 5c8: 88 27 eor r24, r24 5ca: 23 2f mov r18, r19 5cc: 33 27 eor r19, r19 5ce: 28 2b or r18, r24 5d0: 39 2b or r19, r25 return (crc); 5d2: 02 c0 rjmp .+4 ; 0x5d8 unsigned int data; unsigned int crc = 0xffff; char *data_p = 0x0000; if (length == 0) return (~crc); 5d4: 20 e0 ldi r18, 0x00 ; 0 5d6: 30 e0 ldi r19, 0x00 ; 0 crc = ~crc; data = crc; crc = (crc << 8) | (data >> 8 & 0xff); return (crc); } 5d8: c9 01 movw r24, r18 5da: cf 91 pop r28 5dc: 08 95 ret 000005de : uint8_t read_module_id() { return eeprom_read_byte((const uint8_t *)MODULE_ID_ADDRESS); 5de: 80 e0 ldi r24, 0x00 ; 0 5e0: 90 e0 ldi r25, 0x00 ; 0 5e2: 05 d0 rcall .+10 ; 0x5ee <__eerd_byte_tn44> } 5e4: 08 95 ret 000005e6 : uint8_t read_firmware_version() { return eeprom_read_byte((const uint8_t *)FIRMWARE_VERSION_ADDRESS); 5e6: 81 e0 ldi r24, 0x01 ; 1 5e8: 90 e0 ldi r25, 0x00 ; 0 5ea: 01 d0 rcall .+2 ; 0x5ee <__eerd_byte_tn44> 5ec: 08 95 ret 000005ee <__eerd_byte_tn44>: 5ee: e1 99 sbic 0x1c, 1 ; 28 5f0: fe cf rjmp .-4 ; 0x5ee <__eerd_byte_tn44> 5f2: 1f ba out 0x1f, r1 ; 31 5f4: 8e bb out 0x1e, r24 ; 30 5f6: e0 9a sbi 0x1c, 0 ; 28 5f8: 99 27 eor r25, r25 5fa: 8d b3 in r24, 0x1d ; 29 5fc: 08 95 ret 000005fe <_exit>: 5fe: f8 94 cli 00000600 <__stop_program>: 600: ff cf rjmp .-2 ; 0x600 <__stop_program>