Code:
ORCA (Open Redstone Computer Assembler)
8-bit mode
This is the default mode. All instructions set the dest register to the result of the operation (unless otherwise noted) and may have side effects. The inputs to the instruction are x and y.
Assembled code format
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
A |
B |
C |
D |
E |
F |
Assembly | Notes |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
opcode |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
opcode |
no arguments | |||||
opcode |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
y |
opcode y |
y is a register |
|||||||
opcode |
0 |
0 |
0 |
1 |
y |
opcode y |
y is a value |
||||||||||
opcode |
dest |
1 |
y |
opcode dest, y |
dest is a register, y is a value |
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opcode |
dest |
0 |
dest |
y |
opcode dest, y |
dest and y are registers |
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opcode |
dest |
0 |
x |
y |
opcode dest, x, y |
dest, x, and y are registers |
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1 |
1 |
opcode |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
y |
opcode y |
y is a register, only if the opcode starts with 11 |
|||||
1 |
1 |
opcode |
0 |
0 |
1 |
1 |
y |
opcode y |
y is a value, only if the opcode starts with 11 |
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opcode |
0 |
0 |
1 |
0 |
x |
y |
opcode x, y |
x and y are registers, only if the opcode starts with 11 |
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During assembly, if y is a value and more than 127, the last bit of the opcode and y are flipped.
Registers
| ID | Name | Function |
|---|---|---|
000 |
0 |
Always 0 |
001 |
pc |
Program counter |
010 |
sp |
Stack pointer |
011 |
ra |
Return address |
100 |
a |
Accumulator |
101 |
b |
Backup |
110 |
c |
Counter/argument |
111 |
d |
Data/temporary |
Machine code format
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
A |
B |
C |
D |
E |
F |
Notes |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
opcode |
dest |
1 |
y |
x is dest |
||||||||||||
opcode |
dest |
0 |
x |
y |
||||||||||||
Opcode table
00 |
01 |
10 |
11 |
|
|---|---|---|---|---|
000 |
nop |
add |
ld |
jez |
001 |
and |
sub |
ldn |
jnz |
010 |
xor |
adc |
st |
jlz |
011 |
or |
sbb |
stn |
jgz |
100 |
mov |
lsh |
|
jcf |
101 |
not |
rsh |
|
call |
110 |
clc |
arsh |
|
swm16 |
111 |
stc |
|
|
stop |
Opcode meanings
| Opcode | Mnemonic | Result | Notes |
|---|---|---|---|
00000 |
nop |
0 |
|
00001 |
and |
|
|
00010 |
xor |
|
|
00011 |
or |
|
|
00100 |
mov |
y |
|
00101 |
not |
~ |
|
00110 |
clc |
0 |
Sets the carry flag to 0 |
00111 |
stc |
0 |
Sets the carry flag to 1 |
01000 |
add |
|
Sets the carry flag to the carry out |
01001 |
sub |
|
Sets the carry flag to the carry out |
01010 |
adc |
carry flag |
Sets the carry flag to the carry out |
01011 |
sbb |
carry flag |
Sets the carry flag to the carry out |
01100 |
lsh |
|
|
01101 |
rsh |
|
|
01110 |
arsh |
|
Arithmetic, not logical, right shift |
10000 |
ld |
The value at address y |
|
10001 |
ldn |
The value at address ~ |
|
10010 |
st |
0 |
Sets the value of address y to x, does not change dest |
10011 |
stn |
0 |
Sets the value of address ~ to x, does not change dest |
11000 |
jez |
y |
dest is not changed if |
11001 |
jnz |
y |
dest is not changed if |
11010 |
jlz |
y |
dest is not changed if |
11011 |
jgz |
y |
dest is not changed if |
11100 |
jcf |
y |
dest is not changed if the carry flag is 0 |
11101 |
call |
y |
Sets ra to pc |
11110 |
swm16 |
pc |
Switches to 16-bit mode |
11111 |
stop |
pc |
Stops the program |
Instruction aliases
| Mnemonic | Actual |
|---|---|
inc |
add y, 1 |
dec |
sub y, 1 |
alsh |
lsh |
jmp |
mov pc, y |
ret |
mov pc, ra |