/* Generated automatically by the program `genconstants'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CONSTANTS_H
#define GCC_INSN_CONSTANTS_H

#define CMP_CMN 2
#define CMP_CMP 0
#define DOM_CC_NX_OR_Y 1
#define WCGR1 97
#define DOM_CC_X_OR_Y 2
#define NUM_OF_COND_CMP 4
#define CC_REGNUM 100
#define WCGR3 99
#define SP_REGNUM 13
#define R1_REGNUM 1
#define PC_REGNUM 15
#define WCGR0 96
#define VFPCC_REGNUM 101
#define WCGR2 98
#define R0_REGNUM 0
#define CMN_CMP 1
#define LR_REGNUM 14
#define DOM_CC_X_AND_Y 0
#define CMN_CMN 3
#define IP_REGNUM 12
#define LAST_ARM_REGNUM 15

enum unspec {
  UNSPEC_PUSH_MULT = 0,
  UNSPEC_PIC_SYM = 1,
  UNSPEC_PIC_BASE = 2,
  UNSPEC_PRLG_STK = 3,
  UNSPEC_REGISTER_USE = 4,
  UNSPEC_CHECK_ARCH = 5,
  UNSPEC_WSHUFH = 6,
  UNSPEC_WACC = 7,
  UNSPEC_TMOVMSK = 8,
  UNSPEC_WSAD = 9,
  UNSPEC_WSADZ = 10,
  UNSPEC_WMACS = 11,
  UNSPEC_WMACU = 12,
  UNSPEC_WMACSZ = 13,
  UNSPEC_WMACUZ = 14,
  UNSPEC_CLRDI = 15,
  UNSPEC_WALIGNI = 16,
  UNSPEC_TLS = 17,
  UNSPEC_PIC_LABEL = 18,
  UNSPEC_PIC_OFFSET = 19,
  UNSPEC_GOTSYM_OFF = 20,
  UNSPEC_THUMB1_CASESI = 21,
  UNSPEC_RBIT = 22,
  UNSPEC_SYMBOL_OFFSET = 23,
  UNSPEC_MEMORY_BARRIER = 24,
  UNSPEC_UNALIGNED_LOAD = 25,
  UNSPEC_UNALIGNED_STORE = 26,
  UNSPEC_PIC_UNIFIED = 27,
  UNSPEC_LL = 28,
  UNSPEC_VRINTZ = 29,
  UNSPEC_VRINTP = 30,
  UNSPEC_VRINTM = 31,
  UNSPEC_VRINTR = 32,
  UNSPEC_VRINTX = 33,
  UNSPEC_VRINTA = 34,
  UNSPEC_WADDC = 35,
  UNSPEC_WABS = 36,
  UNSPEC_WQMULWMR = 37,
  UNSPEC_WQMULMR = 38,
  UNSPEC_WQMULWM = 39,
  UNSPEC_WQMULM = 40,
  UNSPEC_WQMIAxyn = 41,
  UNSPEC_WQMIAxy = 42,
  UNSPEC_TANDC = 43,
  UNSPEC_TORC = 44,
  UNSPEC_TORVSC = 45,
  UNSPEC_TEXTRC = 46,
  UNSPEC_ASHIFT_SIGNED = 47,
  UNSPEC_ASHIFT_UNSIGNED = 48,
  UNSPEC_CRC32B = 49,
  UNSPEC_CRC32H = 50,
  UNSPEC_CRC32W = 51,
  UNSPEC_CRC32CB = 52,
  UNSPEC_CRC32CH = 53,
  UNSPEC_CRC32CW = 54,
  UNSPEC_AESD = 55,
  UNSPEC_AESE = 56,
  UNSPEC_AESIMC = 57,
  UNSPEC_AESMC = 58,
  UNSPEC_SHA1C = 59,
  UNSPEC_SHA1M = 60,
  UNSPEC_SHA1P = 61,
  UNSPEC_SHA1H = 62,
  UNSPEC_SHA1SU0 = 63,
  UNSPEC_SHA1SU1 = 64,
  UNSPEC_SHA256H = 65,
  UNSPEC_SHA256H2 = 66,
  UNSPEC_SHA256SU0 = 67,
  UNSPEC_SHA256SU1 = 68,
  UNSPEC_VMULLP64 = 69,
  UNSPEC_LOAD_COUNT = 70,
  UNSPEC_VABD_F = 71,
  UNSPEC_VABD_S = 72,
  UNSPEC_VABD_U = 73,
  UNSPEC_VABDL_S = 74,
  UNSPEC_VABDL_U = 75,
  UNSPEC_VADD = 76,
  UNSPEC_VADDHN = 77,
  UNSPEC_VRADDHN = 78,
  UNSPEC_VADDL_S = 79,
  UNSPEC_VADDL_U = 80,
  UNSPEC_VADDW_S = 81,
  UNSPEC_VADDW_U = 82,
  UNSPEC_VBSL = 83,
  UNSPEC_VCAGE = 84,
  UNSPEC_VCAGT = 85,
  UNSPEC_VCEQ = 86,
  UNSPEC_VCGE = 87,
  UNSPEC_VCGEU = 88,
  UNSPEC_VCGT = 89,
  UNSPEC_VCGTU = 90,
  UNSPEC_VCLS = 91,
  UNSPEC_VCONCAT = 92,
  UNSPEC_VCVT = 93,
  UNSPEC_VCVT_S = 94,
  UNSPEC_VCVT_U = 95,
  UNSPEC_VCVT_S_N = 96,
  UNSPEC_VCVT_U_N = 97,
  UNSPEC_VEXT = 98,
  UNSPEC_VHADD_S = 99,
  UNSPEC_VHADD_U = 100,
  UNSPEC_VRHADD_S = 101,
  UNSPEC_VRHADD_U = 102,
  UNSPEC_VHSUB_S = 103,
  UNSPEC_VHSUB_U = 104,
  UNSPEC_VLD1 = 105,
  UNSPEC_VLD1_LANE = 106,
  UNSPEC_VLD2 = 107,
  UNSPEC_VLD2_DUP = 108,
  UNSPEC_VLD2_LANE = 109,
  UNSPEC_VLD3 = 110,
  UNSPEC_VLD3A = 111,
  UNSPEC_VLD3B = 112,
  UNSPEC_VLD3_DUP = 113,
  UNSPEC_VLD3_LANE = 114,
  UNSPEC_VLD4 = 115,
  UNSPEC_VLD4A = 116,
  UNSPEC_VLD4B = 117,
  UNSPEC_VLD4_DUP = 118,
  UNSPEC_VLD4_LANE = 119,
  UNSPEC_VMAX = 120,
  UNSPEC_VMAX_U = 121,
  UNSPEC_VMIN = 122,
  UNSPEC_VMIN_U = 123,
  UNSPEC_VMLA = 124,
  UNSPEC_VMLA_LANE = 125,
  UNSPEC_VMLAL_S = 126,
  UNSPEC_VMLAL_U = 127,
  UNSPEC_VMLAL_S_LANE = 128,
  UNSPEC_VMLAL_U_LANE = 129,
  UNSPEC_VMLS = 130,
  UNSPEC_VMLS_LANE = 131,
  UNSPEC_VMLSL_S = 132,
  UNSPEC_VMLSL_U = 133,
  UNSPEC_VMLSL_S_LANE = 134,
  UNSPEC_VMLSL_U_LANE = 135,
  UNSPEC_VMLSL_LANE = 136,
  UNSPEC_VMOVL_S = 137,
  UNSPEC_VMOVL_U = 138,
  UNSPEC_VMOVN = 139,
  UNSPEC_VMUL = 140,
  UNSPEC_VMULL_P = 141,
  UNSPEC_VMULL_S = 142,
  UNSPEC_VMULL_U = 143,
  UNSPEC_VMUL_LANE = 144,
  UNSPEC_VMULL_S_LANE = 145,
  UNSPEC_VMULL_U_LANE = 146,
  UNSPEC_VPADAL_S = 147,
  UNSPEC_VPADAL_U = 148,
  UNSPEC_VPADD = 149,
  UNSPEC_VPADDL_S = 150,
  UNSPEC_VPADDL_U = 151,
  UNSPEC_VPMAX = 152,
  UNSPEC_VPMAX_U = 153,
  UNSPEC_VPMIN = 154,
  UNSPEC_VPMIN_U = 155,
  UNSPEC_VPSMAX = 156,
  UNSPEC_VPSMIN = 157,
  UNSPEC_VPUMAX = 158,
  UNSPEC_VPUMIN = 159,
  UNSPEC_VQABS = 160,
  UNSPEC_VQADD_S = 161,
  UNSPEC_VQADD_U = 162,
  UNSPEC_VQDMLAL = 163,
  UNSPEC_VQDMLAL_LANE = 164,
  UNSPEC_VQDMLSL = 165,
  UNSPEC_VQDMLSL_LANE = 166,
  UNSPEC_VQDMULH = 167,
  UNSPEC_VQDMULH_LANE = 168,
  UNSPEC_VQRDMULH = 169,
  UNSPEC_VQRDMULH_LANE = 170,
  UNSPEC_VQDMULL = 171,
  UNSPEC_VQDMULL_LANE = 172,
  UNSPEC_VQMOVN_S = 173,
  UNSPEC_VQMOVN_U = 174,
  UNSPEC_VQMOVUN = 175,
  UNSPEC_VQNEG = 176,
  UNSPEC_VQSHL_S = 177,
  UNSPEC_VQSHL_U = 178,
  UNSPEC_VQRSHL_S = 179,
  UNSPEC_VQRSHL_U = 180,
  UNSPEC_VQSHL_S_N = 181,
  UNSPEC_VQSHL_U_N = 182,
  UNSPEC_VQSHLU_N = 183,
  UNSPEC_VQSHRN_S_N = 184,
  UNSPEC_VQSHRN_U_N = 185,
  UNSPEC_VQRSHRN_S_N = 186,
  UNSPEC_VQRSHRN_U_N = 187,
  UNSPEC_VQSHRUN_N = 188,
  UNSPEC_VQRSHRUN_N = 189,
  UNSPEC_VQSUB_S = 190,
  UNSPEC_VQSUB_U = 191,
  UNSPEC_VRECPE = 192,
  UNSPEC_VRECPS = 193,
  UNSPEC_VREV16 = 194,
  UNSPEC_VREV32 = 195,
  UNSPEC_VREV64 = 196,
  UNSPEC_VRSQRTE = 197,
  UNSPEC_VRSQRTS = 198,
  UNSPEC_VSHL_S = 199,
  UNSPEC_VSHL_U = 200,
  UNSPEC_VRSHL_S = 201,
  UNSPEC_VRSHL_U = 202,
  UNSPEC_VSHLL_S_N = 203,
  UNSPEC_VSHLL_U_N = 204,
  UNSPEC_VSHL_N = 205,
  UNSPEC_VSHR_S_N = 206,
  UNSPEC_VSHR_U_N = 207,
  UNSPEC_VRSHR_S_N = 208,
  UNSPEC_VRSHR_U_N = 209,
  UNSPEC_VSHRN_N = 210,
  UNSPEC_VRSHRN_N = 211,
  UNSPEC_VSLI = 212,
  UNSPEC_VSRA_S_N = 213,
  UNSPEC_VSRA_U_N = 214,
  UNSPEC_VRSRA_S_N = 215,
  UNSPEC_VRSRA_U_N = 216,
  UNSPEC_VSRI = 217,
  UNSPEC_VST1 = 218,
  UNSPEC_VST1_LANE = 219,
  UNSPEC_VST2 = 220,
  UNSPEC_VST2_LANE = 221,
  UNSPEC_VST3 = 222,
  UNSPEC_VST3A = 223,
  UNSPEC_VST3B = 224,
  UNSPEC_VST3_LANE = 225,
  UNSPEC_VST4 = 226,
  UNSPEC_VST4A = 227,
  UNSPEC_VST4B = 228,
  UNSPEC_VST4_LANE = 229,
  UNSPEC_VSTRUCTDUMMY = 230,
  UNSPEC_VSUB = 231,
  UNSPEC_VSUBHN = 232,
  UNSPEC_VRSUBHN = 233,
  UNSPEC_VSUBL_S = 234,
  UNSPEC_VSUBL_U = 235,
  UNSPEC_VSUBW_S = 236,
  UNSPEC_VSUBW_U = 237,
  UNSPEC_VTBL = 238,
  UNSPEC_VTBX = 239,
  UNSPEC_VTRN1 = 240,
  UNSPEC_VTRN2 = 241,
  UNSPEC_VTST = 242,
  UNSPEC_VUZP1 = 243,
  UNSPEC_VUZP2 = 244,
  UNSPEC_VZIP1 = 245,
  UNSPEC_VZIP2 = 246,
  UNSPEC_MISALIGNED_ACCESS = 247,
  UNSPEC_VCLE = 248,
  UNSPEC_VCLT = 249,
  UNSPEC_NVRINTZ = 250,
  UNSPEC_NVRINTP = 251,
  UNSPEC_NVRINTM = 252,
  UNSPEC_NVRINTX = 253,
  UNSPEC_NVRINTA = 254,
  UNSPEC_NVRINTN = 255
};
#define NUM_UNSPEC_VALUES 256
extern const char *const unspec_strings[];

enum unspecv {
  VUNSPEC_BLOCKAGE = 0,
  VUNSPEC_EPILOGUE = 1,
  VUNSPEC_THUMB1_INTERWORK = 2,
  VUNSPEC_ALIGN = 3,
  VUNSPEC_POOL_END = 4,
  VUNSPEC_POOL_1 = 5,
  VUNSPEC_POOL_2 = 6,
  VUNSPEC_POOL_4 = 7,
  VUNSPEC_POOL_8 = 8,
  VUNSPEC_POOL_16 = 9,
  VUNSPEC_TMRC = 10,
  VUNSPEC_TMCR = 11,
  VUNSPEC_ALIGN8 = 12,
  VUNSPEC_WCMP_EQ = 13,
  VUNSPEC_WCMP_GTU = 14,
  VUNSPEC_WCMP_GT = 15,
  VUNSPEC_EH_RETURN = 16,
  VUNSPEC_ATOMIC_CAS = 17,
  VUNSPEC_ATOMIC_XCHG = 18,
  VUNSPEC_ATOMIC_OP = 19,
  VUNSPEC_LL = 20,
  VUNSPEC_SC = 21,
  VUNSPEC_LAX = 22,
  VUNSPEC_SLX = 23,
  VUNSPEC_LDA = 24,
  VUNSPEC_STL = 25,
  VUNSPEC_GET_FPSCR = 26,
  VUNSPEC_SET_FPSCR = 27
};
#define NUM_UNSPECV_VALUES 28
extern const char *const unspecv_strings[];

#endif /* GCC_INSN_CONSTANTS_H */